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SL2030
High Performance Broadband Mixer Oscillator Preliminary Information
DS5116 Issue 2.1 October 1999
Features
G G G G G
Ordering Information
SL2030/IG/MP1S (Tubes) SL2030/IG/MP1T (Tape and Reel)
Single Chip Broadband Solution Wide Dynamic Range RF Input Low Phase Noise Balanced Internal Local Oscillator Wide Frequency Range: 50 to 860 MHz ESD Protection 2kV min., MIL-STD-883B Method 3015 Cat.1 (Normal ESD handling procedures should be observed)
Applications
G G G G
Double Conversion Tuners Digital Terrestrial Tuners Data Transmit Systems Data Communications Systems
The SL2030 is a bipolar, broadband wide dynamic range mixer oscillator, optimised for applications as an upconverter in double conversion tuner systems. It also has application in any system where a wide dynamic range broadband frequency converter is required. The SL2030 is a single chip solution containing all necessary active circuitry and simply requires an external tuneable resonant network for the local oscillator. The block diagram is shown in Figure 1 and pin connections are shown in Figure 2. In normal application the high IF output is interfaced through appropriate impedance matching to the high IF filter. The RF input preamplifier of the device is designed for low noise figure within the operating region and for high intermodulation distortion intercept so offering good signal to noise plus composite distortion spurious performance. The preamplifier also provides gain to the mixer section and back isolation from the local oscillator section. The approximate model of the RF input is shown in Figure 3.
The output of the preamplifier is fed to the mixer section which is optimised for low radiation application. In this stage the RF signal is mixed with the local oscillator frequency, which is generated by an on-chip oscillator. The oscillator block uses an external tuneable network and is optimised for low phase noise. A typical application is shown in Figure 6 and the typical phase noise performance in Figure 5. This block also contains a buffer-amplifier to interface with an external PLL to allow for frequency synthesis of the local oscillator. The IF output must be loaded differentially in order to get best intermodulation performance. The approximate model of the IF output is shown in Figure 4. In application care should be taken to achieve symmetric balance to the IF outputs to maximise intermodulation performance.
Absolute Maximum Ratings
Supply voltage, VCC RF differential input voltage All I/O port DC offset Storage temperature Junction temperature Package thermal resistance Chip to ambient, JA Chip to case, JC 20*3V to 17V 2*5V 20*3 to VCC 10*3V 255C to 1150C 1150C 20C/W 80C/W
RFIN RFIN LO2
IF1 IF2
PRSC1 LO1
Figure 1 SL2030 block diagram
SL2030
IF2 NC GND GND GND GND RFIN RFIN
1 2 3 4 5 6 7 8
16 15 14
IF1 NC VCC/VCO LO2 LO1 VCC/VCO PRSC1 VCC/LNA
SL 2030
13 12 11 10 9
MP16
Figure 2 Pin connections - top view
Quick Reference Data
All data applies with circuit component values given in Table 1 Characteristic Value Units MHz dB dB dBV dBc dBV dBV dBc dBc/Hz dBV dBV
50-860 RF input operating frequency range 8 Input noise Figure, SSB, 50 to 860MHz 8 Conversion gain 50 to 860MHz 121 IIP3 input referred ,264 CTB (fully loaded matrix) 104 P1dB input referred 145 IIP2 input referred ,262 Composite 2nd order (fully loaded matrix) LO phase noise at10 kHz offset, fRF 50 to 860MHz, application as in Figure 6 ,285,see Figure 5 LO leak to RF input 72 Fundamental 92 Second harmonic
Electrical Characteristics
Tamb = 240C to 185C, VCC = 5V 65%, VEE = 0V. These characteristics are guaranteed by either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless otherwise stated. Value Characteristic Supply current Pin 9,11,14 Min. Typ. Max. 99 Units mA Conditions IF output pins 1 and 16 will be nominally connected to VCC through the differential balun load as in Figure 6 Operating condition only See Figure 3 Differential voltage gain to 50 load on output of impedance transformer as in Figure 6. 50-860MHz Channel bandwidth 8MHz within operating frequency range 45-865MHz cont...
Input frequency range Composite peak input signal Input impedance Input return loss Conversion gain
7,8 7,8 7,8 7,8
50 97 25 8
860
MHz dBV dB dB
10
225 11
Gain variation across operating range Gain variation within channel Through gain Noise figure
21
11 0*5 220 10 dB dB
6*5
8
2
SL2030 Electrical Characteristics (continued)
Value Characteristic IIP2 IIP3 Composite 2nd order LO operating range LO phase noise, SSB at 10kHz offset IF output frequency range LO and harmonic leakage to RF input Fundamental 2nd harmonic LO Prescaler output swing LO Prescaler output impedance IF output impedance Pin Min. 139 117 12,13 1*0 294 1,16 1 287 Typ. 145 121 262 Max. 153 126 2*1 285 1*3 Units dBV dBV dBc GHz Conditions
Two tones at 92dBV Two tones at 92dBV 128 channels at 62dBV Maximum tuning range 0*9GHz within band, application as in Figure 6 dBc/Hz Application as Figure 6. See Figure 5 for a typical device GHz
7,8 7,8 10 10 1,16
72 92 95 25 75
dBV dBV dBV
To device input To device input Into 50 load See Figure 4
6 PIN 7 3*3p 6 PIN 8 820
PIN 16 PIN 1 2p 325
Figure 3 Approximate model of RF input
288
Figure 4 Approximate model of IF output
PHASE NOISE (dBc/Hz MKRN)
289
290
291
292 50 100
200
300
400
500
600
700
800 850
RF INPUT FREQUENCY (MHz)
Figure 5 Phase noise performance
Application Notes
Figure 6 shows the SL2030 in a typical upconverter application. The network connected to RF input pin 7 and pin 8 is to improve the matching between the device input and the source. The source would normally be from a cable, via passive LPF and PlN-diode attenuator all designed for 75 characteristic impedance. The network connected to the IF output pin 1 and pin 16 is a broadband tuned balun centred typically on 1*1 GHz. This matches the device output impedance of nominally 400 (balanced) to 50 (unbalanced). The network connected to the LO pin 12 and pin 13 is a varactor diode loaded resonant microstrip line resonator. Fine adjustment of the tuning range can be achieved by shortening the line (top end) or by physically moving C19 (see Figure 6) closer to the LO pins. This extends the bottom end of the tuning range. It is important to provide good decoupling on the 5V supplies and to use a layout which provides some isolation between the RF, IF and LO ports.
3
SL2030
IF OUT VCC1 R3 B1 BALUN C5 L2 R4 C16 R5 C20 L4 C6 VCC3 C4 VCC2
L7 C35 L6 C33 L3 C32 C11
J2 POWER 1 5V DEVICE SUPPLY 2 GND
VCC3 C15 C14 VCC2 C17 C9 D2
L5 IF2
1 2 16 15 14
IF1
GND GND GND C2 C29 C1 SKT1 RFIN R2 GND L10 L11 RFIN RFIN
3 4 5 6 7 8
VCC/VCO LO2 LO1 VCC/VCO PRSC1 VCC/LNA C3 C8 C10 C13 D1 C19
S1 RESONATOR
SL 2030
13 12 11 10 9
R10
SKT4 EXTERNAL VARACTOR DRIVE (REMOVE R9)
VCC1 C18 R1
C21
R12
R9
C22
L1
SKT2
130V
NOTE: Refer to Table 1 for component values
C4 L9
C42 C31 R7 CP X1 C30 XTAL
1 2 3 4 5 6 7 8 16 15 14
R8
DRIVE VEE RF I/P RF I/P VCC ADC C43 P0 P1 R11 C24
T1 BCW31 30V
15V
REF/COMP 15V J3 SCL5 5V SDA5
3 4 5 6
J1 POWER 1 30V SYNTHESISER
2
ADDRESS SDA SCL P3 P2
SP 5659
13 12 11 10 9
GND 5V SYNTHESISER
5V
3
C46
C41
I2C BUS
C47
C38
Figure 6 SL2030 upconverter application
4
SL2030
Component C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 C18 C19 C20 C21 C22 C23 C24 C25
Value/type 1nF 1nF 1 nF 1*5pF 1pF 1pF 100pF 100pF 100pF 10F 100nF 100nF 100pF 100pF 100nF 100nF 2pF 100pF 1nF 33nF 1nF
Component C26 C27 C28 C29 C30 C31 C32 C33 C34 C35 C36 C37 C38 C39 C40 C41 C42 C43 C44 C45 C46 C47 D1 D2 L1
Value/type
Component L2 L3 L4 L5 L6 L7 L8 L9 L10 L11 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 S1 T1 X1
Value/type 18nH 220nH 18nH 220nH 220nH 220nH 6*8nH 6*8nH 220 20 1k 120 120 15k 22k 15k 1k 4*7k 50 Resonator (Figure 7) BCW31 4MHz crystal
1*5pF 18pF 330nF 1nF 1nF 100nF 1nF
100pF
4*7F 3*3nF 100nF
100nF 100pF IT402 IT402 100nH
Table 1 Component values for Figure 6
0*5 0*5 1*5
1*0 1*5 0*5 3 3 3
Figure 7 Microstrip resonator (dimensions are in mm)
5
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